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  • ASIC Verification (5 - 10 yrs)

    Test and Verification Solutions Limited - timesjobs

    Block and Top level verification know-howVerification Plan DevelopmentSystem Verilog/OVM or UVMTestbench DevelopmentVHDL/Verilog simulation and debugScriptingNice to haveHVL: Specman is a plusEnd to End RTL Functional Verification ConceptsUnderstanding of power aware architectureExperienceMust have...

  • ASIC Verification (3 - 8 yrs)

    CAREERNET TECHNOLOGIES PVT LTD - timesjobs

    Good exposure to SOC architecture , verification methodologies and flows.Expertise in constraint random verification methodology using UVM and System Verilog.Should have experience in developing VIPs/Environments from scratch.Experience in translating functional specification to test plan and drivi...

  • ASIC Design (6 - 9 yrs)

    Careernet Technologies Pvt Ltd - timesjobs

    The successful candidate will be involved in hands-on implementation of complex networking ASIC and will be responsible for IP/ sub-system level micro-architecture development and RTL coding. He/She will work on every aspect of ASIC design, working closely with the SW, collaborating design and veri...

  • ASIC ENGINEER (2 - 6 yrs)

    Nvidia Corporation - timesjobs

    - BS / MS with 2+ years of experience- Previous silicon bring up and debug experience on complex ASICs- Experience using lab equipment like logic and protocol analyzers, oscilloscopes, BERTs, etc. for silicon debug- Programming skills in C/C++/Perl/Python- Strong analytical and problem solving skil...

  • Senior ASIC Verification Engineer (5 - 10 yrs)

    Sibridge Technologies Pvt. Ltd. - timesjobs

    You will be responsible for defining the verification strategy, including environment, verification IPs, and methodology. Your team of engineers will handle test plan creation, test case development, coverage analysis, to ensure right-first-time-silicon for our customers.You will also have an oppor...

  • ASIC Verification (3 - 8 yrs)

    CAREERNET TECHNOLOGIES PVT LTD - timesjobs

    Good exposure to SOC architecture , verification methodologies and flows.Expertise in constraint random verification methodology using UVM and System Verilog.Should have experience in developing VIPs/Environments from scratch.Experience in translating functional specification to test plan and drivi...

  • ASIC Verification (2 - 6 yrs)

    Oxys Technologies Pvt Ltd - timesjobs

    Proficiency in one or more HVLs a must (System Verilog,Specman, C++, Vera, e, System C, test builder).Strong domain knowledge on one or more - PCIe,USB, Ethernet, ARM, AHB/AXI, AMBAShould have worked on SOC verification on at least one project with constrained random methodology (eRM/VMM/OVM).Must ...

  • ASIC Verification (8 - 10 yrs)

    Test and Verification Solutions Limited - timesjobs

    8-10 years of experienceFront-end design verificationPCIE with Ethernet express or SataTB developmentSV/VMM methodologyFirst level Rtl debuggingConstraint random testingFibre Channel (FC) protocol (or any Networking Protocol)Synopsys tools (VCS, DVE)Test plan development/understanding (form Arch/Ua...

  • ASIC Verification (2 - 6 yrs)

    Oxys Technologies Pvt Ltd - timesjobs

    Proficiency in one or more HVLs a must (System Verilog,Specman, C++, Vera, e, System C, test builder).Strong domain knowledge on one or more - PCIe,USB, Ethernet, ARM, AHB/AXI, AMBAShould have worked on SOC verification on at least one project with constrained random methodology (eRM/VMM/OVM).Must ...

  • ASIC Verification (3 - 8 yrs)

    Test and Verification Solutions Limited - timesjobs

    Overall 3-10 years of experience on SOC/IP verification with ARM coresExperience and working knowledge of HVLs (SV/C++/),SV,UVMUVM Testbench, coding and good understanding of design issues in RTLExposure to assertions/SVA, functional coverage, gate level simulations with SDF, verification planner a...

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