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    Technology Jobs for Dynamic Random Access Memory (DRAM)
  • SMTS Design Engineer (5 - 10 yrs)

    KEY RESPONSIBILITIESPotential roles of a Microprocessor Performance Engineer include:Benchmark/workload analysis, characterization and optimizationPerformance model development and simulationAPU power and performance tradeoffsMicroarchitecture definition and evaluationJob responsibilities also inclu...

  • SR. MEMORY SYSTEM ARCHITECT (5 - 10 yrs)

    - Drive new memory system architectures from DRAM up.- Explore architecture trade-offs in system performance, area, and power consumption.- Develop interconnect (Network-on-chip - NOC) and memory hierarchies for high performance parallel computer architectures (system-on-a-chip SOC).- Add virtualiza...

  • Software/Hardware/Firmware Engineer

    ${Description} In HP, we invent new technologies and innovative information products. Change markets. Create business opportunities.We also help to plan and broaden company strategy, and deliver the science and technology that achieves it. And that gives HP leadership.Were focused on e-services...te...

  • IOT software Trainer (2 - 7 yrs)

    Develop/modify/adapt Linux device drivers and board support packages for new processors, memory chips, I/O chipsets, I/O interfaces and boards e.g. x86, ARM, FLASH, DRAM, Ethernet, WiFi, ZigBee, 2G, 3G, CAN, SPI, I2C, I2S,GPIO, USB and PCIe.Develop applications that demonstrate and validate new embe...

  • Corebsp- Board Level Engineer (5 - 8 yrs)

    Exp in Core BSP board bring up, board level validation identifying issues debugging the same at board level.Exp in C programming linux internalStrong Experience in PCB technologies (Printed ciruit board)Good knowledge/Experience in SOC architecture DDR SystemExp-5-8 YrsLocation:HyderabadJD:The chart...

  • Corebsp- Board Level Engineer (5 - 8 yrs)

    Exp in Core BSP board bring up, board level validation identifying issues debugging the same at board level.Exp in C programming linux internalStrong Experience in PCB technologies (Printed ciruit board)Good knowledge/Experience in SOC architecture DDR SystemExp-5-8 YrsLocation:HyderabadJD:The chart...

  • RTL Design & Verification Engineers (3 - 8 yrs)

    Network packet header parsing, packet classification.WQ manager, QoS support.H/W traffic managerCPU pipeline architecture design, more than 1000 h/w processor. Processorss ISA is Ericssons own design.Memory sub-system, memory controller, DDR3, SRAM, RLDRAM etc, DRAM controllerPCI expressSearch engin...

  • APU Performance Verification Manager (12 - 15 yrs)

    The main roles of this team are to execute architectural definition and trade-off studies, to generate performance projections and to carry out performance verification. The teams key focus is to improve the performance of world-class Accelerated Processing Units (APUs). The APU includes a growing n...

  • Digital Design Engineer (5 - 10 yrs)

    Able to Run formal verification tools for early design testDevelop RTL module level design document from specificationRTL implementation in Verilog/System verilog,Synthesis,PR ,Timing closurePerformance analysis of existing design and feasibility analysis for new designsDefine, implement and maintai...

  • Digital Verification Engineering Lead (10 - 15 yrs)

    Expert level knowledge of ASIC/FPGA/SoC Design Verification flows and toolAble to Run formal verification tools for early design testDevelop RTL Microarchitecture from specificationRTL implementation in Verilog/System verilog,Synthesis,PR ,Timing closurePerformance analysis of existing design and fe...

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Awards & Accolades for MyTechLogy
Winner of
REDHERRING
Top 100 Asia
Finalist at SiTF Awards 2014 under the category Best Social & Community Product
Finalist at HR Vendor of the Year 2015 Awards under the category Best Learning Management System
Finalist at HR Vendor of the Year 2015 Awards under the category Best Talent Management Software
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