MyPage is a personalized page based on your interests.The page is customized to help you to find content that matters you the most.

I'm not curious

Mirafra Technologies - DFT Engineer - MBIST/ATPG (3-10 yrs)

Location Bangalore, India
Posted 18-June-2019

JD :

- Scan insertion, MBIST, Boundary scan, JPAG,EDT insertion.

- Block level Test pattern Generation (ATPG) and simulation

- Ppst Silicon debug support experience

- Tools experience: VCS/NCSim/Modelsim

- Compliers: Fastscan/ Testkompress /DFTAdvisor/Spyglass

- Scripting Skills:Perl/TCL

- DFT architecture definition w.r.t. test time/cost, coverage, test power.

- Good experience/concept on all aspect of DFT i.e. SCAN/ATPG, MBIST, Boundary Scan.

- DFT logic integration and verification.

- Experience on debugging low coverage.

- Gate Level DFT verification with and without timing.

- Experience of leading small DFT team is plus.

- Good experience on EDA tools of reputed vendor like Mentor, Synopsis.

- LBIST experience is plus.

- DFT mode STA and timing closer support.

- Familiar to Verilog and RTL simulation.

- Strong knowledge and experience in Scan Insertion, TestKompression, ATPG, Memory BIST and JTAG at IC

function trackViewJobDescription(){_gaq.push([_trackEvent, Job,ViewJobDescription, view_Origin__/j/mirafra-technologies-dft-engineer-mbist-atpg-3-10-yrs-453407.html__Source__JobDescription__CategoryId__4__jobId__453407__UserId____RecruiterId__61408__Status__LoggedOut___c2777324bb83d6c95ea783dbcbd98e0b_-_54.251.58.178,,]);}window.onload = trackViewJobDescription;

Awards & Accolades for MyTechLogy
Winner of
Top 100 Asia
Finalist at SiTF Awards 2014 under the category Best Social & Community Product
Finalist at HR Vendor of the Year 2015 Awards under the category Best Learning Management System
Finalist at HR Vendor of the Year 2015 Awards under the category Best Talent Management Software
Hidden Image Url