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MTS Product Development Eng. (ATE)

Location Singapore, Singapore
Posted 13-March-2021
Description
THE ROLE:

Test Engineering is a cost, quality, and time-to-market driven team responsible for enabling the availability of microprocessors to our customers. Pre-silicon responsibilities for the Test Engineer include understanding product features, developing characterization test plans, highlighting test coverage holes, and developing software and hardware infrastructure to execute those plans. This requires interaction with Design and Platform Engineering and allows for the opportunity to provide test enhancement feedback for future designs. Post-silicon responsibilities include microprocessor debug & analysis and the execution of characterization plans. This may include silicon performance issues, yield issues, manufacturing processes, and device marginalities. The Test Engineer will work closely with Design and Platform Engineering to root cause issues that result from the debug, characterization and margin analysis. The Test Engineer will also provide datasheet specifications and drive improvements in yield.


THE PERSON:

Position includes test planning, test creation, characterization, data analysis, and silicon debug of ATPG tests in cutting edge process technologies. Applicant should be familiar with scan hardware compressions, failure mechanisms and debug processes. ATE experience required. Solid coding skills preferred.

AMDs environment is fast paced, results oriented and built upon a legion of forward-thinking people with a passion for winning technology!


KEY RESPONSIBILITIES:

Development and debug of test patterns and test flows
Pre-Silicon pattern validation process
AC scan (at-speed) development, debug, test and characterization
Characterization and debug of new silicon designs and process technologies
Optimization of test flows for increased quality and cost improvement
Analysis of part failures leading to test flow improvement
Analysis of characterization data
Perform Test program integration, validation, and releases
Willingness to explore and develop new skillsets on other IPs.
Support HVM operations (ATE and SLT) if needed


PREFERRED EXPERIENCE:

5 years or more proven experience
Strong communication skills including data presentation
Java, Perl, C coding skills
Strong ATE test class/method development experience with Advantest 93k and/or T2K platform preferred
ATPG pattern development and debug experience
Experience with Mentor or Cadence EDA tools a plus
Unix and Windows proficiency
Modern computer architecture knowledge
JTAG knowledge


ACADEMIC CREDENTIALS:

BS/MS EE or equivalent
Experience
Min 5 to 8 Years.

 
Awards & Accolades for MyTechLogy
Winner of
REDHERRING
Top 100 Asia
Finalist at SiTF Awards 2014 under the category Best Social & Community Product
Finalist at HR Vendor of the Year 2015 Awards under the category Best Learning Management System
Finalist at HR Vendor of the Year 2015 Awards under the category Best Talent Management Software
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