The candidate will be a key member of the Synopsys Design Ware ARC Processor hardware team. The role offers learning and exposure to various key functions in the hardware development that include design, functional and performance verification, fpga and backend flows. Responsibilities include developing automation infrastructure in the ARC processors domain that includes a wide range of development tools, testing frameworks, and processor simulators. The main task will be understanding various hardware development flows, fine tuning and automating them to improve the efficiency and reuse. The technologies and tools used cover RTL design, verification, synthesis, fpga and various backend flows.
Essential qualifications: Bachelors degree in engineering is required as a minimum Requires a 0+ years of related experience Understanding of complete VLSI design flow Basics knowledge of Digital Design and Verification is must. HDL and Verification languages: System Verilog, Verilog Programming skills : C, C++, assembly, Perl, Bash, Python, makefile generation. Basic system administration skills for Linux and Windows operating systems Understanding of SQL and relational database management system (MySQL pref.) Good level of both verbal and written English
Optional qualifications: Familiarity with GitLab CI/CD, Jenkins, Jira Understanding of Configuration Management approach Skills in source code management tools (e.g. Git, Perforce) Understanding of software development process Knowledge of web application development and integration (e.g., REST, SOAP, JSON, etc.)
We offer: Interesting work in international team that provides exposure to complete hardware development flow Flexible work schedule Access to internal learning resources (e.g. Coursera for Enterprise) Career and professional development opportunities