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CPU-SoC Silicon Design Engineering Intern

Location Penang , , Malaysia
Posted 16-March-2021

Job Description :
Job Description
In this position you will be involving in the training design and development of next generation SOC CPU for wide range of Intel products and Internet of Things. Your responsibilities will include one or some of the following but not limited to: - IP RTL design/development or IP integration into SOC. Assist in implementing new features, change requests/improvements on existing features for the IP. Perform FE Quality checks in various logic design aspect ranging from RTL static checks to RTL synthesizability check, timing/power convergence, netlist quality check, Formal Equivalent Verification and many more. Perform design exercise, collaborate with verification team for functional/feature/integration validation. -Define VLSI Structural Design methodology and developing design flows Implement structural physical designs such as synthesis floor planning power-grid and clock tree designs timing budgeting and closure place and route RC-extraction and integration Verify structural physical designs such as functional equivalency timing performance noise layout design rules reliability and power. -Develop Analog IP on next generation deep submicron process for the Intel SOC perform tasks related to very large scale integration (VLSI) complementary metaloxide semiconductor CMOS IC design Solid state physics and physical layout Such tasks may include Circuit design of high speed clocking related circuits phase locked loop PLL delay locked loop DLL bandgap or high voltage input-output IO double data rate DDRLPDDR General purpose input-output GPIO OPIO. -Responsible to validate and integrate third party Intellectual Properties IPs ensuring they meet product specification and functionality before they are productized into physical chip. Successful applicants will be required to work very closely with design teams and architects to implement the low-level Register Transfer Logic (RTL) design to ensure overall good functionality of the chip. Develop specific test environment/platform, validation methodology and test plan to validate System on Chip SOC design by identifying and exercising boundary conditions and special cases in an effort to break the chip to find that last elusive bug. -Oversees definition, design, verification, and documentation for SoC System on a Chip development for testability and debuggability . Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for integration of cell libraries, functional units and sub-systems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Performs all aspects of the SoC design flow from high-level design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing. Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results. May also review vendor capability to support development.
You must possess the below minimum qualifications to be initially considered for this position. Minimum requirements: -Students pursuing a Bachelor degree in EECS or related major with good CGPA. -Good communication skills and proficient in English. -Knowledge on Unix VLSI Design SOCPC Architecture System Verilog is major plus.Inside this Business Group
The Devices Development Group (DDG) is a global organization focused on the development and integration of SOCs, critical IPs including Atom and chipsets that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.
Other Locations
Malaysia, Penang

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