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System Validation Engineer

Location Bengaluru, India
Posted 30-September-2021
Description
System Validation Engineer
Creates, defines and develops system validation environment and test suites. Uses and applies emulation and platformlevel tools and techniques to ensure performance to spec. Responsible for the development of methodologies, execution of validation plans, and debug of failures. Requires broad understanding of multiple system areas and requires interfaces with Architecture, Design, and Presilicon Validation teams in improving postsilicon test content and providing feedback for future ondie debug features.


Qualifications

i) Bachelors/Masters in Hardware Engineering or Electrical/Electronics Engineering or Computer Engineering or Computer Science with minimum 5 years to 10 years (Domain Lead position) of related work experience. ii) Candidate Must have high degree of Hardware architecture/ microarchitecture experience in CPU/SoC/Chipset/and one of the subsystems areas given below Strong knowledge and skills of Intel IA (IA32 architecture with uArch debug knowledge of Intels Core and Uncore or equivalent architecture.) ii) Candidate Must have high degree of Hardware architecture/ microarchitecture experience in CPU/SoC/Chipset/and one of the subsystems areas given below - Strong knowledge and skills of Intel IA (IA32 architecture with uArch debug knowledge of Intels Core and Uncore or equivalent architecture.) - Knowledge of IA/ARM core and system level Power Management architecture who familiar in PMC feature, VID setting, Gate/Chip level power management transition state etc. Understanding of System Reset and Thermal related Validation expertise is a plus. - Deep understanding of memory Controller / DDR (2/3/4) memory architecture and debug. LPDDR knowledge is a plus. - Deep understanding of Graphics, media, Audio, Camera interface, imaging and printing , flash storage technology architecture and debug. iii) Solid understanding of the Validation and Debug flows of a complex CPU Silicon: iv) Knowledge on Validation/ Debug Flows and overall SOC Architecture. v) Pre-silicon Design / Validation knowledge is a value add. vi) Good working knowledge in C/Python SW programming for content development and scripting. vii) Knowledge of Verilog/VHDL and EDA design tools and pre si validation methodology is a plus. viii) Excellent written and oral communications and experience working in a cross functional team environment are essential. ix) Good Team Player. x) Processes strong problem solving, analytical and debug skills.
Experience
Min 10 to 13 Years.

 
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