MyPage is a personalized page based on your interests.The page is customized to help you to find content that matters you the most.


I'm not curious
2

SoC Design Engineer

Location Bengaluru, India
Posted 03-July-2022
Description
The Power Management Controller (PMC) IP is responsible for managing the system boot and power for Client and Server chipsets. As the PMC IP DevOps Technical leader of the PMC team, you will work closely with PMC IP hardware RTL designer, firmware developer and verification and validation engineer to drive the direction of development infrastructure to enable best-in-class CI/CD and quality in IP development.

You will be part of a global working environment with colleagues located around the globe.
Your responsibilities will include:

Ensures the efficient planning, provisioning, installation/configuration, maintenance, and/or operations of the hardware and software infrastructure required to build, validate, and release a wide variety of hardware and software products and projects.
Works closely with development and quality teams to derive infrastructure design requirements, build, test, and automate tools appropriate to the project, and/or implements and maintains of those systems within the constraints imposed by infrastructure and other governing bodies.
Owns the end-to-end delivery pipeline, including source management, versioning/tagging strategy, component build and packaging, test automation tooling, release staging, acceptance and/or indicators, required security and IP scans, any third party conformance tools, artifact storage and distribution, and disaster recovery planning.
Identifies opportunities and implements solutions for increased automation, reliability, and/or velocity within the pipeline through implementation of robust infrastructure telemetry, KPIs, and indicators, and by monitoring and applying industry best practices.


Qualifications


Bachelors, a Masters degree or a Ph.D. in Software Engineering, Computer Engineering, Computer Science, Electrical and Electronics Engineering or similar technical degree.

Additional qualifications include:
At least 10 years of relevant working experience in an IP or software development environment.
Demonstrated leadership in managing Source Configuration Management (SCM), Build, Test and Release throughout entire Product Life Cycle (PLC), including process improvement activities.
Experience with continuous integration and SCM tools, such as: git, github, or other industry standard tools.
Experience with build management tools such as: Jenkins, GitLab CI, GitHub Actions, automation design work, debugging and scripting tools such as: Perl, Python, Ruby, Bash.
Ability to work independently and interdependently effectively
Effective communication skills


Inside this Business Group
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations. DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.
Experience
Min 10 to 13 Years.

 
Awards & Accolades for MyTechLogy
Winner of
REDHERRING
Top 100 Asia
Finalist at SiTF Awards 2014 under the category Best Social & Community Product
Finalist at HR Vendor of the Year 2015 Awards under the category Best Learning Management System
Finalist at HR Vendor of the Year 2015 Awards under the category Best Talent Management Software
Hidden Image Url