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    Technology Jobs for Forward Error Correction (FEC)
  • DSP and Algorithms Engineer

    Description DSP and Algorithms Engineer full time position san jose, CA job description: Responsibilities & Duties: The DSP & Algorithms IP Engineer will develop exciting IP for Intel FPGAs for DSP and cloud applications, such as wireless, machine learning, genomics, video streaming, finance, and co...

  • Senior Engineer/SME (CM)

    Overview ProSync is searching for an experienced engineer for Next Generation Processing with a background as an optical/telecommunications engineering. Responsibilities Title of Position: Senior Engineer Description of Position: The position will function as a Senior Engineer for Next Genera...

  • Senior Front-End Developer with AngularJS

    Overview: In this role you will: The FEC now seeks a vendor to build a modern, state of the art, cloud-based platform independent electronic filing system including data applications (analogous to current FECFile and WebForms) and electronic filing Back End infrastructure (EFI) for receiving, proces...

  • Baseband design

    Engineers with 4 to 5 years experience Candidates having 4 to 5 years experience in the design and development of Packet Radio baseband design using VHDL/ Verilong. Must have experience in any of the following: - Channel coding & FEC - Direct conversion, modulation/demodulation techniques including ...

  • Sr. Front-End Developer with AngularJS

    Company/Position Overview In this role you will:The FEC now seeks a vendor to build a modern, state of the art, cloud-based platform independent electronic filing system including data applications (analogous to current FECFile and WebForms) and electronic filing back-end infrastructure (EFI) for...

  • Sr. Python Developer

    Company/Position Overview In this role you will:The FEC now seeks a vendor to build a modern, state of the art, cloud-based platform independent electronic filing system including data applications (analogous to current FECFile and WebForms) and electronic filing back-end infrastructure (EFI) for...

  • Analog Design

    Engineers with 4 to 5 years experience Candidates having 4 to 5 years experience in the design and development of Packet Radio baseband design using VHDL/ Verilong. Must have experience in any of the following: - Channel coding FEC - Direct conversion, modulation/demodulation techniques including bu...

  • Hardware Design

    Engineers with 4 to 5 years experience Candidates having 4 to 5 years experience in the design and development of Packet Radio baseband design using VHDL/ Verilong. Must have experience in any of the following: - Channel coding FEC - Direct conversion, modulation/demodulation techniques including bu...

  • Digital Design

    Engineers with 4 to 5 years experience Candidates having 4 to 5 years experience in the design and development of Packet Radio baseband design using VHDL/ Verilong. Must have experience in any of the following: - Channel coding FEC - Direct conversion, modulation/demodulation techniques including bu...

  • Validation Engineer

    Engineers with 4 to 5 years experience Candidates having 4 to 5 years experience in the design and development of Packet Radio baseband design using VHDL/ Verilong. Must have experience in any of the following: - Channel coding FEC - Direct conversion, modulation/demodulation techniques including bu...

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