Verilog HDL Programming with Xilinx ISE & Spartan/Nexys FPGA
Udemy
Course Summary
In 4.5 hours you will learn: Verilog Programming with ISE Design Suit & Program Spartan/Nexys FPGA Boards
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Course Description
>>>>##### We have attached the "Verilog Programming Reference Guide with the Course"Â #####<<<<
This Course of Verilog HDL Programming for Beginners is targeted for those enthusiasts and beginners who want to get idea of Verilog, Its programming methodology, syntax, operators, simulation steps etc. We have started this course from very basic to the designing combinational and sequential circuits (including Finite State Machine) Design.We have used Xilinx ISE Design suit in this course because of it's License is free from Xilinx (you just need to make a user acoount and follow: How to Get free Xilinx ISE Design suit License on Google ).
We have showed up you the implementation of Projects of ISE and Spartan 3E & Nexys 2 FPGA and there are some Demo of the implementation on Spartan 3E & Nexys 2FPGA. Finally we have Session on "How to Create PROM File with ISE and Program PROM of Spartan 3E & Nexys 2 FPGA".
So you can practice this course on Xilinx ISE Design Suit or Altera Quartus Suit.